[Soekris] New model net6501

Henrik Brix Andersen henrik at brixandersen.dk
Sat Apr 2 16:14:24 UTC 2011


Hi Soren,

On Apr 2, 2011, at 17:29, Soren Kristensen wrote:
> The Lattice FPGA is part of CPU control and power manangement.

I am confused by the above statement. Is the FPGA available for custom, user-defined functionality or is it pre-programmed with functionality required by the board (CPU control and power management), and thus "only" providing 16 bit GPIO on the 24 pins header?

Regards,
Brix
-- 
Henrik Brix Andersen <henrik at brixandersen.dk>



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