[Soekris] 4801 and FreeBSD -current
rizzo at icir.org
Wed Aug 6 17:15:02 UTC 2003
On Wed, Aug 06, 2003 at 06:54:02PM +0200, Poul-Henning Kamp wrote:
> In message <20030806094040.B62011 at xorpc.icir.org>, Luigi Rizzo writes:
> >On Wed, Aug 06, 2003 at 03:47:39PM +0200, Poul-Henning Kamp wrote:
> >> At least under FreeBSD -current, but probably also -stable, the TSC
> >> is no good for timekeeping.
> >why is that ?
> It seems to be one of the "stop TSC while halted" things.
> In addition they have the oddest bug I've seen on a TSC for a long time:
oh sorry, is this specific to the CPU used on the 4801 then ?
> 2.17 Time Stamp Counter rollover
> The upper 32 bits of the Time Stamp Counter (TSC) increment
> three core clocks before the lower 32 bits rollover. If the
> TSC is read and EAX is FFFFFFFDh, FFFFFFFEh, or FFFFFFFFh,
> then EDX will have incremented.
> The TSC cannot be read reliably.
> 1) Use the TSC as a 32-bit counter.
> 2) When the TSC is read and EAX equals FFFFFFFDh, FFFFFFFEh,
> or FFFFFFFFh, then decrement the EDX value by 1.
> Poul-Henning Kamp | UNIX since Zilog Zeus 3.20
> phk at FreeBSD.ORG | TCP/IP since RFC 956
> FreeBSD committer | BSD since 4.3-tahoe
> Never attribute to malice what can adequately be explained by incompetence.
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