[Soekris] comBIOS not initializing PCI device Cache Line Size

Soren Kristensen soren at soekris.com
Thu Feb 28 23:55:22 UTC 2002

Hi Jason,

Jason R Thorpe wrote:
> Folks...
> My net4501 has the following BIOS verison:
> comBIOS ver. 1.00a 20020118  Copyright (C) 2000-2001 Soekris Engineering.
> I've noticed that when the OS gets control, while the PCI bus is already
> configured (i.e. the Ethernet interfaces all have their BARs set up properly),
> the Cache Line Size register is not initialized, but rather is set to 0.
> This prevents the bursting PCI memory read/write commands from working
> properly.
> I can work around it in the OS, but it would be nice if the BIOS were to
> initialize this register, since it has initialized almost all other aspects
> of the PCI bus.  (BTW, the correct value for the register on the net4501
> is 4, since the Am5x86 has a 16 byte cache line.)

Thanks for the information, it is correct that the Cache Line Size
register should be initialized. I will update the BIOS.

But it don't affect a net4501 without any PCI option boards, as the
onboard DP83815 ethernet controllers ignore that register....



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